Precision integrated circuit amplifiers require a calibration process to null out inherent voltage offset for proper operation. Several common methods of voltage offset calibration can be performed by high volume test systems. Typically, a manual adjustment to the amplifier's input stage is performed and ultimately made permanent. A known predictable imbalance is introduced to the differential input stage, which counteracts the effect of voltage offset error VOS. One method of amplifier voltage offset adjustment is described by George Erdi, “A Precision Trim Technique for Monolithic Analog Circuits,” IEEE Journal of Solid-State Circuits, Vol. SC-10, No. 6, December 1975. Selective shorting of Zener diodes adjusts for imbalances in the differential resistive load seen by the input stage differential pair. Additional circuitry must be included in the input stage which, when activated, will produce a known predictable imbalance to counteract and cancel the effect of VOS. Another method of introducing known predictable input stage imbalance is to purposely skew the W/L ratio of the differential input pair by means of CMOS switching the W/L ratio. In yet another known method, one can access an on-the-same-die integrated circuit digital to analog converter (DAC) to steer current and control a degree of DC current imbalance to the differential input pair's load. Since opamp input differential pairs steer the tail (bias) current to a differential load, a digital word in the DAC can counter balance the effect of VOS.
Common test environments for measuring voltage offset of an operational amplifier embedded in an integrated circuit generally involves an integrated circuit handler with external relays to configure the amplifier for noise gains in excess of 100. Very low offset and offset drift amplifiers, for example less than 1 mv of voltage offset, present difficulties in obtaining an accurate measurement of VOS due to thermoelectric voltage error sources in high volume test environments. Thermocouple voltages, produced by the known Seebeck effect, exist wherever two different conductive materials are joined in series, and two junctions of the two conductive materials are at different temperatures. As dissimilar materials exist throughout the testing system, thermocouple voltages are generated that would not be generated during subsequent normal operation of the amplifier with the testing system detached. Each dissimilar junction contributes a thermocouple emf which varies as a function of junction temperature, making it difficult to distinguish between the amplifier voltage offset and unrelated thermocouple potentials. The handler-IC junctions can be a source of voltage offset error that can be comparable in magnitude to the voltage offset that is desired to be calibrated out.
A simplified diagram of a typical testing arrangement, such as described above, is depicted in FIG. 1. Integrated package 10 includes an operational amplifier 12 having input bond wire and package interface and package interface junctions 14 and 16 and an output bond wire and package interface and package interface junction 18. The internal voltage offset of the operational amplifier is represented by a voltage VOS 20. Handler junctions 22 and 24 connect to the input bond wire and package interface and package interface junctions; handler junction 26 connects to the output bond wire and package interface junction. Test relays connect resistor 28, of value R, across the inverting and non-inverting input and resistor 30, of value KR, between the inverting input and output, form thermocouple junctions 32 and 34 respectively. Noise gain resistors 28 and 30 are utilized during testing to establish an amplifier gain for calibrating out offset voltage. The non-inverting amplifier input is connected to ground. Each of the voltages V14–V34 produced by the eight illustrated thermocouple junctions has been identified in the diagram. In the illustrated example, the actual voltage measured at VOUT is as follows:VOUT=(V16+V24−V14−V22+VOS)·(1+K)+V32−K+V34+(V18+V26)·(1+K)/AV where VOS is the voltage offset to be measured and calibrated out, Av is the loop gain of the IC amplifier under test, and Vi is the thermocouple voltage at the ith junction. Because both the amplifier voltage offset (VOS), and the various thermal voltages are both gained up by the noise gain (1+K), it is impossible to distinguish the amplifier's offset voltage contribution by measuring the amplifier's output voltage when the magnitude of the offset is the same order of magnitude as the thermocouple voltages Vi.
The need thus exists for a method and implementation to accurately measure, characterize, and calibrate out voltage offset of precision integrated circuit amplifiers in which thermocouple voltages are significant.